In general, a test handler is used for supporting a tester for testing semiconductor devices fabricated through a preset manufacturing process. The test handler classifies the fabricated semiconductor devices into several classes according to their test results and serves to load those classified devices onto customer trays. Such a test handler has been already known through various published documents.
FIG. 1 shows a schematic perspective view of a conventional test handler 100, and FIG. 2 sets forth a conceptual diagram of major components of the test handler 100 viewed from top. Below, major components of the conventional test handler 100 will be described schematically with reference to FIGS. 1 and 2.
Referring to FIG. 1, the conventional test handler 100 includes a loading unit 110, a soak chamber 120, a test chamber 130, a desoak chamber 140, an unloading unit 150 and a press unit 160.
Further, as shown in FIG. 2, disposed behind the test chamber 130 is a tester 170 for testing semiconductor devices placed on a test tray within the test chamber 130.
FIG. 3 presents a schematic view of the tester shown in FIG. 2. As shown in FIG. 3, the tester 170 includes two Hi-Fix boards 171a and 171b installed at an upper and a lower part of a single test head 172, respectively, wherein each Hi-Fix board 171a (171b) has a number of test sockets 171-1 arranged in a matrix pattern. Each of the Hi-Fix boards 171a and 171b is configured to correspond to one of test trays 11a and 11b, respectively.
Hereinafter, an operation of the test handler 100 having the above configuration will be explained.
Semiconductor devices loaded in customer trays 10a are transferred to and loaded into a test tray in loading positions by the loading unit 110.
The test tray passed through the soak chamber 120 for pre-heating or pre-cooling are and transferred to the test chamber 130. Then, two test trays 11a and 11b are arranged at upper and lower two stage positions, respectively, as illustrated in FIGS. 1 and 2. Subsequently, the press unit 160 pushes the test trays 11a and 11b toward the tester 170 to allow the test trays 11a and 11b to be brought into firm contact with the Hi-Fix boards 171a and 171b of the tester 170, respectively (to be more specific, the semiconductor devices loaded on the test trays are brought into firm contact with test sockets arranged on the Hi-Fix boards). Then, after conducting the test of the semiconductor devices by means of the tester 170, the test tray is passed through the desoak chamber 140 to recover its original temperature and transferred to unloading position. Thereafter, the semiconductor devices loaded on the test tray in the unloading position are unloaded onto the customer trays 10b by the unloading unit 150, and the test tray is returned from the unloading position to the loading positions.
In the above process, when the test trays 11a and 11b are brought into contact with the Hi-Fix boards 17a and 17b by the press unit 160, a firm contact therebetween cannot be obtained if the Hi-Fix boards 171a and 171b are not securely fastened to the test chamber 130, which results in a failure to enable appropriate contact between the semiconductor devices and the test sockets 171-1. Thus, a clamping apparatus is used to firmly fasten the Hi-Fix boards 171a and 171b to the test chamber 130.
FIG. 4 presents a schematic diagram to describe a conventional clamping apparatus.
As shown in FIG. 4, the conventional clamping apparatus has four clamping units 190 for each of the Hi-Fix boards 171a and 171b. Each clamping unit 190 includes a cylinder 191; and a clamper 192 connected to a piston rod 191a of the cylinder 191 and moved to-and-fro to clamp the end sides of corresponding one of the Hi-Fix boards 171a and 171b. Four of the eight clamping units 190 clamp or release the clamping of left end sides of the Hi-Fix boards 171a and 171b, while the other four clamp or release the clamping of right end sides of the Hi-Fix boards 171a and 171b. 
Meanwhile, according to the recent trend for the development of test handlers, the number of semiconductor devices that can be simultaneously measured per a unit time (hereinafter, simply referred to as the number of simultaneous measurements) has been increased to keep up with the increase of the demand for the semiconductor devices. So far, such an increase of the processing speed has been attempted to be achieved by reducing an unnecessary time delay through increasing an operating rate of the loading unit and/or the unloading unit or by testing semiconductor devices loaded in two test trays at one time. In addition, in order to raise the processing speed, it has been attempted to increase the simultaneous measurements by way of enlarging the size of the test trays and thus enabling accommodation of more semiconductor devices therein. However, if the test trays and their relevant components are enlarged, thermal expansion would be expanded accordingly as much as the test trays and the relevant components are enlarged, so that various problems would be caused due to the thermal expansion in addition to other structural problems. Thus, increasing the size of the test trays has been considered to be troublesome. Nevertheless, since the conception of increasing the number of simultaneous measurements by enlarging the size of the test trays has merits, many researches are still being conducted to develop the method, and it is expected that the increase of the test trays in size would be realized in the near future. In case the size of the test trays are enlarged, the size of the High-Fix boards needs to be expanded as well.
However, if the conventional clamping apparatus as shown in FIG. 4 is utilized to firmly fasten the enlarged Hi-Fix board, e.g., 171a, to the test handler, a portion of the Hi-Fix board 171a near a central line C thereof would be unfastened from the test hander, so that there inevitably occurs a gap between the Hi-Fix board 171a and the test handler near the central line ‘C’ of the Hi-Fix board 171a, as illustrated in FIG. 5. The presence of the gap would result in a failure to make appropriate contacts between semiconductor devices located at a certain region ‘E’ near the central line ‘C’ and the test sockets when the test tray, e.g., 11a is brought into firm contact with the Hi-Fix board 171a by the press unit 160, thus hindering the increase of the test trays 11a and 11b in size.
To solve the problem, if it is attempted to install additional clamping units 190 as shown in FIG. 4 to clamp upper and lower end sides of the Hi-Fix boards 171a and 171b, it is difficult to clamp the Hi-Fix boards 171a and 171b's two opposite sides facing each other because there occurs an interference between the installation space of each cylinder 191 of the clamping units 190 and the space occupied by the Hi-Fix boards 171a and 171b. However, using a single Hi-Fix board to avoid the interference problem is not viewed as a consideration because it would result in a reduction of the simultaneous measurements.